About
Renato Mancuso is an Associate Professor in the Computer Science Department at Boston University and the Director of the BU Cyber-Physical Systems Lab. He is a senior member of the IEEE. Prof. Mancuso received a Ph.D. degree from the Department of Computer Science, University of Illinois at Urbana-Champaign in 2017. His research interests include real-time performance management in modern high-performance heterogeneous platforms, profile- and progress-driven resource management, machine learning for embedded and autonomous systems, virtualization solutions to support temporal isolation, and runtime hardware reconfigurable platforms.
Code and hardware artifacts
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Jailhouse-RT Software Maintainer
A fork of the Jailhouse partitioning hypervisor with experimental real-time features. -
Black-Box Profiler (BBProf) Software Maintainer
Kernel- and user-level profiler that characterizes how an unmodified application uses its memory pages. -
RT-Bench Software Co-author of the paper that introduced it
An extensible framework that turns existing benchmarks into periodic real-time workloads. -
MemScope Software Co-author of the paper that introduced it
Kernel-level framework for characterizing heterogeneous memory under controlled contention. -
CacheFlow Software Co-author of the paper that introduced it
Linux kernel module that snapshots the contents of an ARM last-level cache. -
MemorEDF Software and hardware Co-author of the paper that introduced it
Demonstration of combined CPU and memory regulation on a Zynq UltraScale+ board. -
UltraScale+ SpinalHDL Wrapper Hardware design Co-author of the paper that introduced it
Support library that takes SpinalHDL designs to a bitstream on UltraScale+ platforms. -
Omnivisor Software Co-author of the paper that introduced it
Static partitioning hypervisor extension that manages asymmetric cores on MPSoCs. -
RT-virtio Software Co-author of the paper that introduced it
FreeRTOS guest used to evaluate predictable virtio-based inter-VM communication. -
MCU contention and TPA evaluation Software Co-author of the paper that introduced it
Firmware and tooling for studying shared-resource contention on multi-core microcontrollers. -
Relational Memory Engine on FireSim Hardware design Co-author of the paper that introduced it
FireSim setup of the Relational Memory Engine with RISC-V Rocket and BOOM cores. -
FPL Neural Lyapunov Software Co-author of the paper that introduced it
Training code for Lyapunov-stable neural controllers using Fulfillment Priority Logic. -
SLAM isolation controller Software Co-author of the paper that introduced it
User-space controller that protects visual SLAM accuracy under contention. -
Deterministic Memory Software Co-author of the paper that introduced it
Modified Linux kernel and gem5 models for the deterministic memory abstraction. -
SimSo MC-IMA Software Co-author of the paper that introduced it
Fork of the SimSo scheduling simulator with server-based multi-core IMA support. -
INC-OC Software Co-author of the paper that introduced it
Implementation of the INC-OC memory type for predictable coherent caching. -
Unmanned Aerial Vehicle Database (UAVDB) Dataset Co-author of the paper that introduced it
Open flight and ground testing data sets for unmanned aircraft and their components. -
CAPS: Conditioning for Action Policy Smoothness Software Co-author of the paper that introduced it
Regularization that makes reinforcement-learning controllers produce smooth actions. -
Little Actor Software Co-author of the paper that introduced it
Training code and extended results on shrinking actors in actor-critic reinforcement learning. -
UniLCD Project site Co-author of the paper that introduced it
Project site and code for unified local-cloud decision-making via reinforcement learning.
77 publications with the lab
- Programmable Data Layouts via On-The-Fly Data Transformation
- Bottleneck-Aware Bandwidth Regulation for Heterogeneous Memory Subsystems
- Devil-in-FPGA: Coherent Trojans in Reconfigurable Heterogeneous Systems
- Under Pressure: Adaptive Isolation for Visual SLAM Perception Workloads on Contended ARM Hardware
- Accelerating Lyapunov-Stable Neural Control using Fulfillment Priority Logic
- FRACTAL: Fast Reverse Address translation over Coherence for Tracing And Logging
- CAPA: A Framework for Contention-Aware and Progress-Aware Multi-Core Real-Time Systems
- Burning Fetch Execution: A Framework for Zero-Trust Multi-party Confidential Computing
- MemScope: Open-Source Kernel-Level Framework for Heterogeneous Memory Characterization
- RTSS@Work: Toward Commodity Fine-grained Performance Tracing on ARM-based SoC/FPGA platforms
- Closing the Intent-to-Reality Gap via Fulfillment Priority Logic
- Micro-architectural Exploration of the Relational Memory Engine (RME) in RISC-V and FireSim
- RT-Bench: A Long Overdue Update
- Surgical Software-less I/O Virtualization
- UltraScale+ SpinalHDL Wrapper: Streamlining Ideas to Bitstream on UltraScale+ platforms
- Coherence-Aided Memory Bandwidth Regulation
- Shared Resource Contention in Low-end MCUs: A Reality Check and the Quest for Timeliness
- The Omnivisor: A real-time static partitioning hypervisor extension for heterogeneous core virtualization over MPSoCs
- MCTI: Mixed-Criticality Task-based Isolation
- MemPol: Polling-Based Microsecond-Scale Per-Core Memory Bandwidth Regulation
- Effortless Locality on Data Systems Using Relational Fabric
- Unified Local-Cloud Decision-Making via Reinforcement Learning
- Low-overhead Online Assessment of Timely Progress as a System Commodity
- Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs
- Investigating and Mitigating Contention on Low-End Multi-Core Microcontrollers
- MemPol: Policing Core Memory Bandwidth from Outside of the Cores
- Software-Shaped Platforms
- Unikernel Linux (UKL)
- Relational Fabric: Transparent Data Transformation
- Lazy Load Scheduling for Mixed-Criticality Applications in Heterogeneous MPSoCs
- Expanded Flight & Ground Testing Data Set for an Unmanned Aircraft: Great Planes Avistar Elite
- Relational Memory: Native In-Memory Accesses on Rows and Columns
- X-Stream: Accelerating streaming segments on MPSoCs for real-time applications
- Profile-driven memory bandwidth management for accelerators and CPUs in QoS-enabled platforms
- Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems
- A Closer Look at Intel Resource Director Technology (RDT)
- CAESAR: Coherence-Aided Elective and Seamless Alternative Routing via on-chip FPGA
- Hardware Data Re-organization Engine for Real-Time Systems
- Know your Enemy: Benchmarking and Experimenting with Insight as a Goal
- On the Interplay of Computation and Memory Regulation in Multicore Real-Time Systems
- Propulsion System Instrumentation Development and Integration on Small- and Medium-Sized Electric Unmanned Aircraft
- RT-Bench: An Extensible Benchmark Framework for the Analysis and Management of Real-Time Applications
- A Real-Time virtio-based Framework for Predictable Inter-VM Communication
- Honey. I Shrunk The Actor: A Case Study on Preserving Performance with Smaller Actors in Actor-Critic RL
- A Memory Scheduling Infrastructure for Multi-core Systems with Re-programmable Logic
- Energy System Instrumentation and Data Acquisition for Flight Testing a Long-Endurance, Solar-Powered Unmanned Aircraft
- Governing with Insights: Towards Profile-driven Cache Management of Black-Box Applications
- Identifying Unexpected Inter-core Interference Induced by Shared Cache
- Regularizing Action Policies for Smooth Control with Reinforcement Learning
- An analyzable inter-core communication framework for high-performance multicore embedded systems
- How to Train your Quadrotor: A Framework for Consistently Smooth and Responsive Flight Control via Reinforcement Learning
- E-WarP: a System-wide Framework for Memory Bandwidth Profiling and Management
- Reconciling Predictability and Coherent Caching
- SCE-Comm: A Real-Time Inter-Core Communication Framework for Strictly Partitioned Multi-core Processors
- The Potential of Programmable Logic in the Middle: Cache Bleaching
- Continued Development and Flight Testing of a Long-Endurance Solar-Powered Unmanned Aircraft: UIUC-TUM Solar Flyer
- Flight & Ground Testing Data Set for an Unmanned Aircraft: Great Planes Avistar Elite
- A Real-Time Scratchpad-centric OS with Predictable Inter/Intra-Core Communication for Multi-core Embedded Systems
- Designing Mixed Criticality Applications on Modern Heterogeneous MPSoC Platforms
- Impact of DM-LRU on WCET: a Static Analysis Approach
- Design of Multi-Agent UAV Simulator to Support the Development of the MARSNet Communication Protocol
- Unikernels: The Next Stage of Linux’s Dominance
- Deterministic Memory Hierarchy and Virtualization for Modern Multi-Core Embedded Systems
- Reinforcement Learning for UAV Attitude Control
- Flight Data Acquisition Platform Development, Integration, and Operation on Small-to Medium-Sized Unmanned Aircraft
- Flight Testing Data Set for Subscale GA Aircraft: 26%-scale Cub Crafters CC11-100 Sport Cub S2
- Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems
- Deterministic Memory Abstraction and Supporting Multicore System Architecture
- Evaluating the Memory Subsystem of Configurable Heterogeneous MPSoC
- Verification of OS-level Cache Management
- Design, Development, and Initial Testing of a Computationally-Intensive, Long-Endurance Solar-Powered Unmanned Aircraft
- A Scheduling Framework for Handling Integrated Modular Avionic Systems on Multicore Platforms
- On Exploiting Structured Human Interactions to Enhance Sensing Accuracy in Cyber-physical Systems
- A Rolling Rig for Propeller Performance Testing
- WCET Derivation Under Single Core Equivalence With Explicit Memory Budget Assignment
- A Reliable and Predictable Scratchpad-centric OS for Multi-core Embedded Systems
- Optimizing resource speed for two-stage real-time tasks