CPSLab Cyber-Physical Systems Lab, Boston University

Publications Partially Reconfigurable Platforms

Hardware Data Re-organization Engine for Real-Time Systems

Shahin Roozkhosh, Denis Hoornaert, Renato Mancuso, Manos Athanassoulis

WiP Session @ 43rd IEEE Real-Time Systems Symposium (RTSS@Work 2022), 2022, Houston, TX, USA

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Fig. 1: On-the-fly data transformation enhancing data locality.

Abstract

Access patterns and cache utilization play a key role in the analyzability of data-intensive applications. In this demo, we re-examine our previous research on software-hardware codesign to push data transformation closer to memory from a real-time perspective. Deployed in modern CPU+FPGA systems, our design enables efficient and cache-friendly access to large data by only moving relevant bytes from the target memory. This (1) compresses the cache footprint and (2) reorganizes complex memory access patterns into sequential and predictable patterns.

Cite this paper

@inproceedings{RT_DataReorg_WiP_RTSS22,
  title     = {{Hardware Data Re-organization Engine for Real-Time Systems}},
  author    = {Roozkhosh, Shahin and Hoornaert, Denis and Mancuso, Renato and Athanassoulis, Manos},
  booktitle = {WiP Session @ 43rd IEEE Real-Time Systems Symposium (RTSS@Work 2022)},
  year      = 2022,
  address   = {Houston, TX, USA},
  url       = {https://cs-people.bu.edu/rmancuso/files/papers/RT_RME_RTSS22.pdf}
}

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