Publications Memory & Shared-Resource Management
MCTI: Mixed-Criticality Task-based Isolation
Real-Time Systems, June 2024
Abstract
The ever-increasing demand for high performance in the time-critical, low-power embedded domain drives the adoption of powerful but unpredictable, heterogeneous Systems-on-Chip. On these platforms, the main source of unpredictability—the shared memory subsystem—has been widely studied, and several approaches to mitigate undesired effects have been proposed over the years. Among them, performance-counter-based regulation methods have proved particularly successful. Unfortunately, such regulation methods require precise knowledge of each task’s memory consumption and cannot be extended to isolate mixed-criticality tasks running on the same core as the regulation budget is shared. Moreover, the desirable combination of these methodologies with well-known time-isolation techniques—such as server-based reservations—is still an uncharted territory and lacks a precise characterization of possible benefits and limitations. Recognizing the importance of such consolidation for designing predictable real-time systems, we introduce MCTI (Mixed-Criticality Task-based Isolation) as a first initial step in this direction. MCTI is a hardware/software co-design architecture that aims to improve both CPU and memory isolations among tasks with different criticalities even when they share the same CPU. In order to ascertain the correct behavior and distill the benefits of MCTI, we implemented and tested the proposed prototype architecture on a widely available off-the-shelf platform. The evaluation of our prototype shows that (1) MCTI helps shield critical tasks from concurrent non-critical tasks sharing the same memory budget, with only a limited increase in response time being observed, and (2) critical tasks running under memory stress exhibit an average response time close to that achieved when running without memory stress.
Code and hardware artifacts
Cite this paper
@article{MCTI_RTSJ24,
title = {{MCTI: Mixed-Criticality Task-based Isolation}},
author = {Hoornaert, Denis and Ghaemi, Golsana and Bastoni, Andrea and Mancuso, Renato and Caccamo, Marco and Corradi, Giulio},
journal = {Real-Time Systems},
year = 2024,
month = jun,
publisher = {Springer Nature},
doi = {10.1007/s11241-024-09425-5},
url = {https://doi.org/10.1007/s11241-024-09425-5}
}
TY - JOUR AU - Hoornaert, Denis AU - Ghaemi, Golsana AU - Bastoni, Andrea AU - Mancuso, Renato AU - Caccamo, Marco AU - Corradi, Giulio TI - MCTI: Mixed-Criticality Task-based Isolation JO - Real-Time Systems PY - 2024 DA - 2024/06// PB - Springer Nature DO - 10.1007/s11241-024-09425-5 UR - https://doi.org/10.1007/s11241-024-09425-5 AB - The ever-increasing demand for high performance in the time-critical, low-power embedded domain drives the adoption of powerful but unpredictable, heterogeneous Systems-on-Chip. On these platforms, the main source of unpredictability—the shared memory subsystem—has been widely studied, and several approaches to mitigate undesired effects have been proposed over the years. Among them, performance-counter-based regulation methods have proved particularly successful. Unfortunately, such regulation methods require precise knowledge of each task’s memory consumption and cannot be extended to isolate mixed-criticality tasks running on the same core as the regulation budget is shared. Moreover, the desirable combination of these methodologies with well-known time-isolation techniques—such as server-based reservations—is still an uncharted territory and lacks a precise characterization of possible benefits and limitations. Recognizing the importance of such consolidation for designing predictable real-time systems, we introduce MCTI (Mixed-Criticality Task-based Isolation) as a first initial step in this direction. MCTI is a hardware/software co-design architecture that aims to improve both CPU and memory isolations among tasks with different criticalities even when they share the same CPU. In order to ascertain the correct behavior and distill the benefits of MCTI, we implemented and tested the proposed prototype architecture on a widely available off-the-shelf platform. The evaluation of our prototype shows that (1) MCTI helps shield critical tasks from concurrent non-critical tasks sharing the same memory budget, with only a limited increase in response time being observed, and (2) critical tasks running under memory stress exhibit an average response time close to that achieved when running without memory stress. ER -
%0 Journal Article %A Hoornaert, Denis %A Ghaemi, Golsana %A Bastoni, Andrea %A Mancuso, Renato %A Caccamo, Marco %A Corradi, Giulio %T MCTI: Mixed-Criticality Task-based Isolation %J Real-Time Systems %D 2024 %I Springer Nature %R 10.1007/s11241-024-09425-5 %U https://doi.org/10.1007/s11241-024-09425-5 %X The ever-increasing demand for high performance in the time-critical, low-power embedded domain drives the adoption of powerful but unpredictable, heterogeneous Systems-on-Chip. On these platforms, the main source of unpredictability—the shared memory subsystem—has been widely studied, and several approaches to mitigate undesired effects have been proposed over the years. Among them, performance-counter-based regulation methods have proved particularly successful. Unfortunately, such regulation methods require precise knowledge of each task’s memory consumption and cannot be extended to isolate mixed-criticality tasks running on the same core as the regulation budget is shared. Moreover, the desirable combination of these methodologies with well-known time-isolation techniques—such as server-based reservations—is still an uncharted territory and lacks a precise characterization of possible benefits and limitations. Recognizing the importance of such consolidation for designing predictable real-time systems, we introduce MCTI (Mixed-Criticality Task-based Isolation) as a first initial step in this direction. MCTI is a hardware/software co-design architecture that aims to improve both CPU and memory isolations among tasks with different criticalities even when they share the same CPU. In order to ascertain the correct behavior and distill the benefits of MCTI, we implemented and tested the proposed prototype architecture on a widely available off-the-shelf platform. The evaluation of our prototype shows that (1) MCTI helps shield critical tasks from concurrent non-critical tasks sharing the same memory budget, with only a limited increase in response time being observed, and (2) critical tasks running under memory stress exhibit an average response time close to that achieved when running without memory stress.
[
{
"id": "MCTI_RTSJ24",
"type": "article-journal",
"title": "MCTI: Mixed-Criticality Task-based Isolation",
"author": [
{
"family": "Hoornaert",
"given": "Denis"
},
{
"family": "Ghaemi",
"given": "Golsana"
},
{
"family": "Bastoni",
"given": "Andrea"
},
{
"family": "Mancuso",
"given": "Renato"
},
{
"family": "Caccamo",
"given": "Marco"
},
{
"family": "Corradi",
"given": "Giulio"
}
],
"container-title": "Real-Time Systems",
"issued": {
"date-parts": [
[
2024,
6
]
]
},
"publisher": "Springer Nature",
"DOI": "10.1007/s11241-024-09425-5",
"abstract": "The ever-increasing demand for high performance in the time-critical, low-power embedded domain drives the adoption of powerful but unpredictable, heterogeneous Systems-on-Chip. On these platforms, the main source of unpredictability—the shared memory subsystem—has been widely studied, and several approaches to mitigate undesired effects have been proposed over the years. Among them, performance-counter-based regulation methods have proved particularly successful. Unfortunately, such regulation methods require precise knowledge of each task’s memory consumption and cannot be extended to isolate mixed-criticality tasks running on the same core as the regulation budget is shared. Moreover, the desirable combination of these methodologies with well-known time-isolation techniques—such as server-based reservations—is still an uncharted territory and lacks a precise characterization of possible benefits and limitations. Recognizing the importance of such consolidation for designing predictable real-time systems, we introduce MCTI (Mixed-Criticality Task-based Isolation) as a first initial step in this direction. MCTI is a hardware/software co-design architecture that aims to improve both CPU and memory isolations among tasks with different criticalities even when they share the same CPU. In order to ascertain the correct behavior and distill the benefits of MCTI, we implemented and tested the proposed prototype architecture on a widely available off-the-shelf platform. The evaluation of our prototype shows that (1) MCTI helps shield critical tasks from concurrent non-critical tasks sharing the same memory budget, with only a limited increase in response time being observed, and (2) critical tasks running under memory stress exhibit an average response time close to that achieved when running without memory stress."
}
]
D. Hoornaert, G. Ghaemi, A. Bastoni, R. Mancuso, M. Caccamo, and G. Corradi, “MCTI: Mixed-Criticality Task-based Isolation,” Real-Time Systems, Jun. 2024, doi: 10.1007/s11241-024-09425-5.
Hoornaert, D., Ghaemi, G., Bastoni, A., Mancuso, R., Caccamo, M., & Corradi, G. (2024). MCTI: Mixed-Criticality Task-based Isolation. Real-Time Systems. Springer Nature. https://doi.org/10.1007/s11241-024-09425-5