Publications Workload Profiling
Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems
IEEE Transactions on Computers, March 2022
Abstract
The vast majority of high-performance embedded systems implement multi-level CPU cache hierarchies. But the exact behavior of these CPU caches has historically been opaque to system designers. Absent expensive hardware debuggers, an understanding of cache makeup remains tenuous at best. This enduring opacity further obscures the complex interplay among applications and OS-level components, particularly as they compete for the allocation of cache resources. Notwithstanding the relegation of cache comprehension to proxies such as static cache analysis, performance counter-based profiling, and cache hierarchy simulations, the underpinnings of cache structure and evolution continue to elude software-centric solutions. In this paper, we explore a novel method of studying cache contents and their evolution via snapshotting. Our method complements extant approaches for cache profiling to better formulate, validate, and refine hypotheses on the behavior of modern caches. We leverage cache introspection interfaces provided by vendors to perform live cache inspections without the need for external hardware. We present CacheFlow, a proof-of-concept Linux kernel module which snapshots cache contents on an NVIDIA Tegra TX1 system on chip and a Hardkernel Odroid XU4.
Code and hardware artifacts
Cite this paper
@article{cacheflow_tc21,
title = {{Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems}},
author = {Tarapore, Dharmesh and Roozkhosh, Shahin and Brzozowski, Steven and Mancuso, Renato},
journal = {IEEE Transactions on Computers},
year = 2022,
month = mar,
volume = {71},
number = {03},
pages = {559--572},
address = {Los Alamitos, CA, USA},
doi = {10.1109/TC.2021.3060650},
url = {https://doi.org/10.1109/TC.2021.3060650}
}
TY - JOUR AU - Tarapore, Dharmesh AU - Roozkhosh, Shahin AU - Brzozowski, Steven AU - Mancuso, Renato TI - Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems JO - IEEE Transactions on Computers PY - 2022 DA - 2022/03// VL - 71 IS - 03 CY - Los Alamitos, CA, USA SP - 559 EP - 572 DO - 10.1109/TC.2021.3060650 UR - https://doi.org/10.1109/TC.2021.3060650 AB - The vast majority of high-performance embedded systems implement multi-level CPU cache hierarchies. But the exact behavior of these CPU caches has historically been opaque to system designers. Absent expensive hardware debuggers, an understanding of cache makeup remains tenuous at best. This enduring opacity further obscures the complex interplay among applications and OS-level components, particularly as they compete for the allocation of cache resources. Notwithstanding the relegation of cache comprehension to proxies such as static cache analysis, performance counter-based profiling, and cache hierarchy simulations, the underpinnings of cache structure and evolution continue to elude software-centric solutions. In this paper, we explore a novel method of studying cache contents and their evolution via snapshotting. Our method complements extant approaches for cache profiling to better formulate, validate, and refine hypotheses on the behavior of modern caches. We leverage cache introspection interfaces provided by vendors to perform live cache inspections without the need for external hardware. We present CacheFlow, a proof-of-concept Linux kernel module which snapshots cache contents on an NVIDIA Tegra TX1 system on chip and a Hardkernel Odroid XU4. ER -
%0 Journal Article %A Tarapore, Dharmesh %A Roozkhosh, Shahin %A Brzozowski, Steven %A Mancuso, Renato %T Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems %J IEEE Transactions on Computers %D 2022 %V 71 %N 03 %P 559-572 %C Los Alamitos, CA, USA %R 10.1109/TC.2021.3060650 %U https://doi.org/10.1109/TC.2021.3060650 %X The vast majority of high-performance embedded systems implement multi-level CPU cache hierarchies. But the exact behavior of these CPU caches has historically been opaque to system designers. Absent expensive hardware debuggers, an understanding of cache makeup remains tenuous at best. This enduring opacity further obscures the complex interplay among applications and OS-level components, particularly as they compete for the allocation of cache resources. Notwithstanding the relegation of cache comprehension to proxies such as static cache analysis, performance counter-based profiling, and cache hierarchy simulations, the underpinnings of cache structure and evolution continue to elude software-centric solutions. In this paper, we explore a novel method of studying cache contents and their evolution via snapshotting. Our method complements extant approaches for cache profiling to better formulate, validate, and refine hypotheses on the behavior of modern caches. We leverage cache introspection interfaces provided by vendors to perform live cache inspections without the need for external hardware. We present CacheFlow, a proof-of-concept Linux kernel module which snapshots cache contents on an NVIDIA Tegra TX1 system on chip and a Hardkernel Odroid XU4.
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"abstract": "The vast majority of high-performance embedded systems implement multi-level CPU cache hierarchies. But the exact behavior of these CPU caches has historically been opaque to system designers. Absent expensive hardware debuggers, an understanding of cache makeup remains tenuous at best. This enduring opacity further obscures the complex interplay among applications and OS-level components, particularly as they compete for the allocation of cache resources. Notwithstanding the relegation of cache comprehension to proxies such as static cache analysis, performance counter-based profiling, and cache hierarchy simulations, the underpinnings of cache structure and evolution continue to elude software-centric solutions. In this paper, we explore a novel method of studying cache contents and their evolution via snapshotting. Our method complements extant approaches for cache profiling to better formulate, validate, and refine hypotheses on the behavior of modern caches. We leverage cache introspection interfaces provided by vendors to perform live cache inspections without the need for external hardware. We present CacheFlow, a proof-of-concept Linux kernel module which snapshots cache contents on an NVIDIA Tegra TX1 system on chip and a Hardkernel Odroid XU4."
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D. Tarapore, S. Roozkhosh, S. Brzozowski, and R. Mancuso, “Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems,” IEEE Transactions on Computers, vol. 71, no. 03, pp. 559–572, Mar. 2022, doi: 10.1109/TC.2021.3060650.
Tarapore, D., Roozkhosh, S., Brzozowski, S., & Mancuso, R. (2022). Observing the Invisible: Live Cache Inspection for High-Performance Embedded Systems. IEEE Transactions on Computers, 71(03), 559–572. https://doi.org/10.1109/TC.2021.3060650