Strong from the observation that unpredictability arises from a lack of fine-grained control over the behavior of shared hardware components, we outline a promising new resource management approach. We demonstrate that it is possible to introduce Programmable Logic In-the-Middle (PLIM) between a traditional multi-core processor and main memory. This provides the unique capability of manipulating individual memory transactions.
We proposed, implemented, and evaluated a first technique, Cache Bleaching, that leverages PLIM to solve long-standing shortcomings of page-coloring-based cache partitioning.
With the Bleacher (right), colored addresses are de-colored hence, previously scattered pages (left) become contiguous in DRAM